1. Field of the Invention
The present invention relates to a semiconductor device.
2. Description of Related Art
Conventionally, a three-dimensional semiconductor integrated circuit device has been known having a configuration wherein two or more wafers are stacked and electrically connected with penetrating wiring.
For example, Japanese Unexamined Patent Application, First Publication No. H11-261000 discloses a semiconductor device obtained by the following manufacturing method. After making a trench (i.e., a deep groove) in one of the wafers to be stacked and thermally-oxidizing an inner part of the trench, Poly-Si is buried in the trench as a conductor to form a penetrating wiring. The wafer thickness is reduced until the penetrating wiring is exposed, and backside bumps are formed at positions corresponding to the penetrating wiring on the backside of the wafer. The backside bumps of this wafer are then stacked with frontside bumps formed on a front surface of another wafer. An insulating adhesive is then injected between the two stacked wafers. In this manner, a three-dimensional semiconductor integrated circuit device is manufactured.
Furthermore, a semiconductor device that includes a desired semiconductor circuit, made by bonding a plurality of substrates and electrically connecting semiconductor circuit parts disposed on the substrates, is disclosed in, for example, Japanese Unexamined Patent Application, First Publication No. 2007-59769. In the semiconductor device disclosed in this literature, by joining a penetrating wiring part exposed from an backside of a upper substrate and a frontside bump on a lower substrate, a semiconductor circuit part of the upper substrate can be electrically connected to a semiconductor circuit part of the lower substrate.
However, there is a problem in a conventional semiconductor device in which a plurality of wafers are bonded together, in that there may be positional deviation among some of the electrode parts to be connected on opposite sides of the wafers, leading to portions where electrodes are unconnected. This problem becomes more noticeable when the wafers are made larger and thinner, and when the electrode parts are miniaturized and multi-layered wirings on the wafers are made more complex.
The present invention has been realized in view of the above, and an object thereof is to provide a semiconductor device in which there are unlikely to be unconnected electrode parts on oppositely arranged wafers.
To achieve this object, the inventors researched the causes of positional deviation among electrode parts on oppositely arranged wafers. The following cause was discovered. In processes such as an element formation process and a multilayer wiring formation process during processes of manufacturing a wafer to be bonded, stress accumulates on a face of the substrate on which a device is disposed. As a result, deformations of the wafer, such as expansion and contraction occur. For example, when the wafer is thick, it bows due to expansion and contraction of the device face. This expansion and contraction (warpage) is even more noticeable during a reducing process of wafer thickness.
The inventors then closely examined substrate warpage during manufacture of the wafer. As a result, it was discovered that, by increasing the area of one of the opposing electrode parts on the wafers, they can be easily arranged opposite each other even if the substrates had suffered warpage when manufacturing the wafers. The inventors thus conceived of the semiconductor device of the invention, which can prevent generation of unconnected portions of the electrodes on the wafers and achieve a highly reliable connection between them.